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Movellus, Synopsys Team Up for Next-Gen IC Power Boost
Movellus' adaptive clocking technology now available to Synopsys SLM IP customers
Published on Mar. 11, 2026
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Movellus announced the inclusion of its clocking technology in the Synopsys Silicon Lifecycle Management (SLM) IP portfolio, directly addressing power challenges facing complex chips in the age of AI. The Synopsys SLM Advanced Clock Generator ("ACG") IP serves as the foundation for real-time power optimization, enabling power architects to dynamically adapt SoC profiles to environmental and workload changes optimizing performance and power.
Why it matters
As AI and hyperscale workloads push the boundaries of semiconductor complexity, managing power optimization and power integrity has become a key challenge. The integration of Movellus' adaptive clocking technology into Synopsys' SLM portfolio provides power architects with a sophisticated, real-time solution to optimize power efficiency.
The details
The Synopsys SLM ACG IP delivers high-performance, adaptive clock generation for droop mitigation and Dynamic Frequency Scaling (DFS)/Dynamic Voltage and Frequency Scaling (DVFS) applications. The ACG IP provides ultra-fast adaptive clocking, extensive programmability to address varied use cases, and advanced telemetry to monitor droop events, DFS/DVFS transitions, and clock health.
- The Synopsys SLM ACG IP will be demonstrated at the Synopsys User Group (SNUG) as part of Synopsys Converge 2026, March 11-12 in Santa Clara, California.
The players
Movellus
A company that provides critical power and performance optimization technology integrated into a range of applications from edge AI devices to cloud datacenter compute and networking offerings.
Synopsys
A leading provider of electronic design automation (EDA) software and services, and the developer of the Silicon Lifecycle Management (SLM) IP portfolio.
Steve Pateras
Vice president of SLM product management at Synopsys.
Vikram Karvat
Chief operating officer at Movellus.
What they’re saying
“As AI and hyperscale workloads push the boundaries of semiconductor complexity, managing power optimization and power integrity has become a key challenge our customers”
— Steve Pateras, Vice president of SLM product management at Synopsys (Mirage News)
“The combination of Synopsys sensor portfolio and Movellus adaptive clocking IP provides a comprehensive power, thermal, and performance optimization platform to our mutual customers”
— Vikram Karvat, Chief operating officer at Movellus (Mirage News)
What’s next
The Synopsys SLM ACG IP will be demonstrated at the Synopsys User Group (SNUG) as part of Synopsys Converge 2026, March 11-12 in Santa Clara, California.
The takeaway
The integration of Movellus' adaptive clocking technology into Synopsys' SLM portfolio provides power architects with a sophisticated, real-time solution to optimize power efficiency for complex chips in the age of AI and hyperscale workloads.
